Current research: optimization for energy-efficient VLSI circuits, on-chip communication fabrics, dynamic power management, adaptive circuit design, interactions between physical design and system-level design, heuristics for large scale combinatorial optimization.
Works By Students
principal investigator on
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Works By Students
chaired theses and dissertations
Belsare, Aditya Sanjay (2014-08).
Sparse LU Factorization for Large Circuit Matrices on Heterogenous Parallel Computing Platforms.
Bhosekar, Shilpa (2018-08).
Best Effort Minimal Routing for Fly-Over: A Light Weight Distributed Mechanism for Energy Efficient Network-On-Chip.
Chang, Chi-Yu (2012-08).
Analytical Layer Planning for Nanometer VLSI Designs.
Chen, Pu (2016-12).
Security Attack Models for Split Manufacturing of Integrated Circuits.
Chen, Xi (2013-05).
Physical Planning and Uncore Power Management for Multi-Core Processors.
Gangrade, Rohit (2016-05).
GPU Based Acceleration of SystemC and Transaction Level Models for MPSOC Simulation.
Gao, Zhuoyang (2015-12).
Comparative Study on Performance and Variation Tolerance of Low Power Circuit.
Gope, Dibakar (2011-08).
Maximizing Crosstalk-Induced Slowdown During Path Delay Test.
He, Hao (2016-12).
Resource Management Algorithms for Computing Hardware Design and Operations: From Circuits to Systems.
Huang, Yi-Le (2010-12).
An Improved Lagrangian Relaxation Method for VLSI Combinational Circuit Optimization.
Irukula, Shivaram (2015-12).
Reinforcement Learning Based Controller For Precision Irrigation.
Jindal, Tanuj (2010-08).
Detecting Tangled Logic Structures in VLSI Netlists.
Kansal, Rohan (2013-08).
A Pure STT-MRAM Design for High-bandwidth Low-power On-chip Interconnects.
Kumar, Rohit (2014-08).
Timing Verification of Adaptive Integrated Circuits.
Li, Chaofan (2018-08).
Synthesis Techniques for Power-Efficient Integrated Circuits.
Lu, Ang (2015-12).
Proximity Optimization for Adaptive Circuit Design.
Ni, Ruixiao (2014-05).
On the Effectiveness of Source Throttling for Networks-on-Chip in Chip Multiprocessor Designs.
Panda, Reena (2011-12).
A Branch-Directed Data Cache Prefetching Technique for Inorder Processors.
Puli, Ramprakash Reddy (2018-05).
Active Routing: Compute on the Way for Near-Data Processing.
Ramakrishnan, Sundararajan (2010-08).
Case Studies on Clock Gating and Local Routign for VLSI Clock Mesh.
Rasheed, Farah (2013-12).
Artificial Neural Network Circuit for Spectral Pattern Recognition.
Rasheed, Shalimar (2014-05).
A Network-on-Chip Router for Low-Latency and High-Throughput Dimension-Order Routing.
Sharma, Prabal (2013-08).
A Branch Predictor Directed Data Cache Prefetcher for Out-of-order and Multicore Processors.
Shen, Yiren (2016-05).
Parallel Acceleration for Timing Analysis and Optimization of Adaptive Integrated Circuits.
Shim, Kyu-Nam 1978- (2012-12).
Voltage and Timing Adaptation for Variation and Aging Tolerance in Nanometer VLSI Circuits.
Shrija, . (2016-12).
A Reconfigurable Approximate JPEG Encoder Implemented On FPGA Platform.
Singh, Amrinder (2010-08).
Case Studies on Variation Tolerant and Low Power Design Using Planar Asymmetric Double Gate Transistor.
Sun, Lijia (2018-08).
Modeling and Control Techniques in Smart Systems.
Tsai, Jung-Tai (2013-08).
VLSI Interconnect Optimization Considering Non-uniform Metal Stacks.
Wang, Jiafan (2017-08).
Adaptive Integrated Circuit Design for Variation Resilience and Security.
Won, Jae Yeon (2015-08).
Dynamic Voltage and Frequency Scaling Techniques for Chip Multiprocessor Designs.
Wu, Chia-Yu (2015-08).
A Pre-Search Assisted ILP Approach to Analog Integrated Circuit Routing.
Xu, Zheng (2013-08).
Control Techniques for Uncore Power Mangement in Chip Multiprocessor Designs.
Yang, Gongming (2014-05).
NoC Resource Allocation Based on Physical Design Techniques.
Yang, Yu (2011-05).
Clustering-Based Simultaneous Task and Voltage Scheduling for NoC Systems.
Zhai, Sitong (2015-08).
A Layer Centric VLSI Physical Design Methodology Considering Non-uniform Metal Stacks.
Zhao, Qiong (2012-05).
Track Assignment Considering Crosstalk-Induced Performance Degradation.