Steiner Tree Optimization for Buffers, Blockages, and Bays Academic Article uri icon

abstract

  • Timing optimization is a critical component of deep submicrometer design and buffer insertion is an essential technique for achieving timing closure. This work studies buffer insertion under the constraint that the buffers either: 1) avoid blockages or 2) are contained within preassigned buffer bay regions. We propose a general Steiner-tree formulation to drive this application and present a maze-routing-based heuristic that either avoids blockages or finds buffer bays. We show that the combination of our Steiner-tree optimization with leading-edge buffer-insertion techniques leads to effective solutions on industry designs.

published proceedings

  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

altmetric score

  • 3

author list (cited authors)

  • Alpert, C. J., Gandham, G., Hu, J., Neves, J. L., Quay, S. T., & Sapatnekar, S. S.

citation count

  • 26

complete list of authors

  • Alpert, Charles J||Gandham, Gopal||Hu, Jiang||Neves, Jose L||Quay, Stephen T||Sapatnekar, Sachin S

publication date

  • April 2001