Utilizing Redundancy for Timing Critical Interconnect Academic Article

authors

• Hu, Jiang

published proceedings

• IEEE Transactions on Very Large Scale Integration (VLSI) Systems

author list (cited authors)

• Hu, S., Li, Q., Hu, J., & Li, P.

citation count

• 3

complete list of authors

• Hu, Shiyan||Li, Qiuyang||Hu, Jiang||Li, Peng

publication date

• October 2007

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Very Large Scale Integration Systems  Journal

keywords

• Non-tree
• Redundancy
• Routing
• Steiner Network
• Variation

Digital Object Identifier (DOI)

• 10.1109/tvlsi.2007.903911

start page

• 1067

end page

• 1080

volume

• 15

issue

• 10