Simultaneous driver sizing and buffer insertion using a delay penalty estimation technique Academic Article uri icon

abstract

  • To achieve timing closure in a placed design, buffer insertion and driver sizing are two of the most effective transforms that can be applied. Since the driver-sizing solution and the buffer-insertion solution affect each other, suboptimal solutions may result if these techniques are applied sequentially instead of simultaneously. We show how to simply extend van Ginneken's buffer-insertion algorithm to simultaneously incorporate driver sizing and introduce the idea of a delay penalty to encapsulate the effect of driver sizing on the previous stage. The delay penalty can be pre-computed efficiently via dynamic programming. Experimental results show that using driver sizing with a delay-penalty function obtains designs with superior timing and area characteristics.

published proceedings

  • IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

altmetric score

  • 3

author list (cited authors)

  • Alpert, C., Chu, C., Gandham, G., Hrkic, M., Hu, J., Kashyap, C., & Quay, S.

citation count

  • 14

complete list of authors

  • Alpert, C||Chu, C||Gandham, G||Hrkic, M||Hu, J||Kashyap, C||Quay, S

publication date

  • January 2004