SHF:Small: OSCARS: Optimizing Self-Configurable Analog ICs for Reliability and Security Grant uri icon

abstract

  • The production of computer chips, specifically analog designs, has largely moved offshore in recent years, reducing design complexity and fabrication cost, because the foundries and the manufacturing process have become expensive. Such chips suffer from two problems: imprecise manufacturing of devices at physical limits and attacks from the untrusted foundry. This project develops solutions that can solve both the problems at once. The project also will engage with and teach the next generation of cybersecurity experts using puzzle-, challenge-, and competition-based educational and outreach activities at the high-school, undergraduate, and graduate levels.The goal of this research is to develop a versatile analog IC design platform that can achieve simultaneous resiliency attacks from the untrusted foundry and improve performance in the presence of imprecise manufacturing. The main approach is built-in self-configuration enabled by efficient circuit implementation of power-on optimization, which is enhanced by logic locking, and systematic design-time optimization. The approach entails identifying the optimal tuning values to make the analog design perform as desired; these tuning knob values are kept as a secret to prevent attacks.This award reflects NSF''s statutory mission and has been deemed worthy of support through evaluation using the Foundation''s intellectual merit and broader impacts review criteria.

date/time interval

  • 2018 - 2021