A Built-In Self-Test and In Situ Analog Circuit Optimization Platform Academic Article

abstract

• 2004-2012 IEEE. In this paper, a built-in self-test and in situ analog circuit optimization platform is proposed and characterized. By integrating a fully digital optimization engine and self-test circuits along with circuits-under-optimization (CUO), this platform can automatically find an operating point that makes a good balance among multiple competing characteristic goals. Therefore, the arbitrary linear time-invariant CUO can be optimized even when there are large process-voltage-temperature variations and aging effects of devices. This platform is analyzed to determine the required accuracy of its building blocks in terms of noise and linearity. The feasibility of this platform is proved by a case study utilizing a Tow-Thomas bandpass biquad.

authors

• Hu, Jiang

published proceedings

• IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

author list (cited authors)

• Lee, S., Shi, C., Wang, J., Sanabria, A., Osman, H., Hu, J., & Sanchez-Sinencio, E.

citation count

• 23

complete list of authors

• Lee, Sanghoon||Shi, Congyin||Wang, Jiafan||Sanabria, Adriana||Osman, Hatem||Hu, Jiang||Sanchez-Sinencio, Edgar

publication date

• October 2018

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Circuits and Systems I: Regular Papers  Journal

keywords

• Aging
• Built-in Self-test (bist)
• Calibration
• Digitally-assisted Analog Circuit
• Distortion
• Linearity
• Low-power
• Noise
• Optimization
• Pvt Tolerant
• STABILITY
• Tuning
• Verification

Digital Object Identifier (DOI)

• 10.1109/TCSI.2018.2805641

start page

• 3445

end page

• 3458

volume

• 65

issue

• 10

URL

• http://dx.doi.org/10.1109/tcsi.2018.2805641