HR job title
- Professor
- Contact Info
- 1 979 862 4253
- Websites
Hoyos, Sebastian Associate Professor
Positions
- Associate Professor, Electrical and Computer Engineering, College of Engineering
My research focuses on the design and implementation of mixed-signal processing systems, techniques and algorithms that jointly design for analog and digital systems with the objective of reducing power consumption and complexity or enhancing performance of high-speed and high dynamic range wireline and wireless communication systems.
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Overview
Publications
selected publications
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academic article
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Yi, I., Kaile, S. K., Zhu, Y., Diaz, J., Hoyos, S., & Palermo, S.
(2024).
A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET. PP(99), 1-12.
-
Bonizzoni, E., & Hoyos, S.
(2023).
Guest Editorial Special Issue on the 2023 ISICAS: A CAS Journal Track Symposium. IEEE Transactions on Circuits and Systems - II - Express Briefs.
70(10), 3726-3726.
-
Zhu, Y., Liu, T., Kaile, S. K., Kiran, S., Yi, I., Liu, R., ... Palermo, S.
(2023).
A 38-GS/s 7-bit Pipelined-SAR ADC With Speed-Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET. 58(8), 2300-2313.
-
Zhao, H., Diaz, J., & Hoyos, S.
(2023).
Multi-Channel Nonlinearity Mitigation Using Machine Learning Algorithms. IEEE Transactions on Mobile Computing.
PP(99), 1-15.
-
Zhu, Y., Diaz, J., Kaile, S. K., Yi, I., Liu, T., Hoyos, S., & Palermo, S.
(2023).
A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET. IEEE Journal of Solid-State Circuits.
58(3), 662-676.
-
Diaz, J., Zhao, H., Zhu, Y., Palermo, S., & Hoyos, S.
(2022).
Recurrent Neural Network Equalization for Wireline Communication Systems. 69(4), 2116-2120.
-
Zhao, H., Gomez Diaz, J. C., & Hoyos, S.
(2022).
Multi-Channel Receiver Nonlinearity Cancellation Using Channel Speculation Passing Algorithm. 69(2), 599-603.
-
Zavareh, A. T., & Hoyos, S.
(2020).
Kalman-Based Real-Time Functional Decomposition for the Spectral Calibration in Swept Source Optical Coherence Tomography. IEEE Transactions on Biomedical Circuits and Systems.
14(2), 257-273.
-
Kiran, S., Cai, S., Zhu, Y., Hoyos, S., & Palermo, S.
(2019).
Digital Equalization With ADC-Based Receivers. IEEE Microwave Magazine.
20(5), 62-79.
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Kiran, S., Cai, S., Luo, Y., Hoyos, S., & Palermo, S.
(2019).
A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS. IEEE Journal of Solid-State Circuits.
54(3), 659-671.
-
Kiran, S., Shafik, A., Tabasy, E. Z., Cai, S., Lee, K., Hoyos, S., & Palermo, S.
(2019).
Modeling of ADC-Based Serial Link Receivers With Embedded and Digital Equalization. IEEE Transactions on Components, Packaging and Manufacturing Technology.
9(3), 536-548.
-
Palermo, S., Hoyos, S., Cai, S., Kiran, S., & Zhu, Y.
(2018).
Analog-to-Digital Converter-Based Serial Links: An Overview. IEEE Solid-State Circuits Magazine.
10(3), 35-47.
-
Zhou, J., Zavareh, A. T., Gupta, R., Liu, L., Wang, Z., Sadler, B. M., Silva-Martinez, J., & Hoyos, S.
(2017).
Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices. IEEE Transactions on Circuits and Systems I: Regular Papers.
64(9), 2495-2507.
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Cai, S., Tabasy, E. Z., Shafik, A., Kiran, S., Hoyos, S., & Palermo, S.
(2017).
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS. IEEE Journal of Solid-State Circuits.
52(8), 2168-2179.
-
Cai, S., Zhu, Y., Kiran, S., Hoyos, S., & Palermo, S.
(2017).
Reference switching pre-emphasis-based successive approximation register ADC with enhanced DAC settling. Electronics Letters.
53(20), 1352-1353.
-
Palermo, S., Hoyos, S., Shafik, A., Tabasy, E. Z., Cai, S., Kiran, S., & Lee, K.
(2016).
CMOS ADC-Based Receivers for High-Speed Electrical and Optical Links. IEEE Communications Magazine.
54(10), 168-175.
-
Shafik, A., Tabasy, E. Z., Cai, S., Lee, K., Hoyos, S., & Palermo, S.
(2016).
A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization. IEEE Journal of Solid-State Circuits.
51(3), 671-685.
-
Qian, H., Liu, Q., Silva-Martinez, J., & Hoyos, S.
(2016).
A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS. IEEE Journal of Solid-State Circuits.
51(3), 587-597.
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Jeon, H., Silva-Martinez, J., & Hoyos, S.
(2015).
A Process-Variation Resilient Current Mode Logic With Simultaneous Regulations for Time Constant, Voltage Swing, Level Shifting, and DC Gain Using Time-Reference-Based Adaptive Biasing Chain. IEEE Transactions on Very Large Scale Integration Systems.
23(1), 198-202.
-
Tabasy, E. Z., Shafik, A., Lee, K., Hoyos, S., & Palermo, S.
(2014).
A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications. IEEE Journal of Solid-State Circuits.
49(11), 2560-2574.
-
Zhou, J., Hoyos, S., & Sadler, B.
(2014).
Asynchronous compressed beamformer for portable diagnostic ultrasound systems. IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.
61(11), 1791-1801.
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Sadler, B. M., & Hoyos, S.
(2014).
Towards a Standard Mixed-Signal Parallel Processing Architecture for Miniature and Microrobotics. Journal of Research of the National Institute of Standards and Technology.
119, 529-539.
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Tabasy, E. Z., Shafik, A., Huang, S., Yang, N., Hoyos, S., & Palermo, S.
(2013).
A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS. IEEE Journal of Solid-State Circuits.
48(8), 1885-1897.
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Chen, X. i., Sobhy, E. A., Yu, Z., Hoyos, S., Silva-Martinez, J., Palermo, S., & Sadler, B. M.
(2012).
A Sub-Nyquist Rate Compressive Sensing Data Acquisition Front-End. IEEE Journal on Emerging and Selected Topics in Circuits and Systems.
2(3), 542-551.
-
Zhou, J., Ramirez, M., Palermo, S., & Hoyos, S.
(2012).
Digital-Assisted Asynchronous Compressive Sensing Front-End. IEEE Journal on Emerging and Selected Topics in Circuits and Systems.
2(3), 482-492.
-
Saad, R., Aristizabal-Ramirez, D. L., & Hoyos, S.
(2012).
Sensitivity Analysis of Continuous-Time Delta Sigma ADCs to Out-of-Band Blockers in Future SAW-Less Multi-Standard Wireless Receivers. IEEE Transactions on Circuits and Systems I: Regular Papers.
59(9), 1894-1905.
-
Hoyos, S., Tsang, C. W., Vanderhaegen, J., Chiu, Y., Aibara, Y., Khorramabadi, H., & Nikolic, B.
(2012).
A 15 MHz to 600 MHz, 20 mW, 0.38 mm2 Split-Control, Fast Coarse Locking Digital DLL in 0.13 $mu$m CMOS. IEEE Transactions on Very Large Scale Integration Systems.
20(3), 564-568.
-
Pentakota, K., Ramirez, M. A., & Hoyos, S.
(2012).
LEAST MEAN SQUARED BACKGROUND CALIBRATION FOR OFDM MULTICHANNEL RECEIVERS. Journal of Circuits, Systems and Computers.
21(1), 1250014-1250014.
-
Yu, Z., Zhou, J., Ramirez, M., Hoyos, S., & Sadler, B. M.
(2012).
The impact of ADC nonlinearity in a mixed-signal compressive sensing system for frequency-domain sparse signals. PHYSICAL COMMUNICATION.
5(2), 196-207.
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Sobhy, E. A., Helmy, A. A., Hoyos, S., Entesari, K., & Sanchez-Sinencio, E.
(2011).
A 2.8-mW Sub-2-dB Noise-Figure Inductorless Wideband CMOS LNA Employing Multiple Feedback. IEEE Transactions on Microwave Theory and Techniques.
59(12), 3154-3161.
-
Chen, X. i., Yu, Z., Hoyos, S., Sadler, B. M., & Silva-Martinez, J.
(2011).
Corrections to A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing [Mar 11 507-520]. 58(11), 2801-2801.
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Sobhy, E. A., Pentakota, S., Yu, Z., & Hoyos, S.
(2011).
Analytical framework and bandwidth optimisation of orthogonal frequency division multiplexing low-order multi-channel filter-bank receivers for achieving sampling clock-jitter robustness. IET Circuits Devices & Systems.
5(5), 360-364.
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Chen, X. i., Yu, Z., Hoyos, S., Sadler, B. M., & Silva-Martinez, J.
(2011).
A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing. IEEE Transactions on Circuits and Systems I: Regular Papers.
58(3), 507-520.
-
Saad, R., & Hoyos, S.
(2011).
Feedforward spectral shaping technique for clock-jitter induced errors in digital-to-analogue converters. Electronics Letters.
47(3), 171-U655.
-
Hoyos, S., Pentakota, S., Yu, Z., Ghany, E., Chen, X. i., Saad, R., Palermo, S., & Silva-Martinez, J.
(2011).
Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach. IEEE Transactions on Circuits and Systems I: Regular Papers.
58(2), 253-263.
-
Sobhy, E. A., & Hoyos, S.
(2010).
A Multiphase Multipath Technique With Digital Phase Shifters for Harmonic Distortion Cancellation. IEEE Transactions on Circuits and Systems - II - Express Briefs.
57(12), 921-925.
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Kim, J., Hoyos, S., & Silva-Martinez, J.
(2010).
Wideband Common-Gate CMOS LNA Employing Dual Negative Feedback With Simultaneous Noise, Gain, and Bandwidth Optimization. IEEE Transactions on Microwave Theory and Techniques.
58(9), 2340-2351.
-
Raviprakash, K., Saad, R., & Hoyos, S.
(2010).
Reduced area discrete-time down-sampling filter embedded with windowed integration samplers. Electronics Letters.
46(12), 828-829.
-
Saad, R., & Hoyos, S.
(2010).
Sensitivity of single-bit continuous-time Delta Sigma analogue-to-digital converters to out-of-band blockers. Electronics Letters.
46(12), 826-827.
-
Lu, C., Silva-Rivas, J. F., Kode, P., Silva-Martinez, J., & Hoyos, S.
(2010).
A Sixth-Order 200 MHz IF Bandpass Sigma-Delta Modulator With Over 68 dB SNDR in 10 MHz Bandwidth. IEEE Journal of Solid-State Circuits.
45(6), 1122-1136.
-
Yu, Z., Chen, X. i., Hoyos, S., Sadler, B. M., Gong, J., & Qian, C.
(2010).
Mixed-Signal Parallel Compressive Spectrum Sensing for Cognitive Radios. International Journal of Digital Multimedia Broadcasting.
2010, 1-10.
-
Sobhy, E. A., Hoyos, S., & Sanchez-Sinencio, E.
(2010).
High-PSRR low-power single supply OTA (vol 46, pg 337, 2010). Electronics Letters.
46(9), 663-663.
-
Sobhy, E. A., Hoyos, S., & Sanchez-Sinencio, E.
(2010).
High-PSRR low-power single supply OTA. Electronics Letters.
46(5), 337-U4855.
-
Prakasam, P. K., Kulkarni, M., Chen, X. i., Yu, Z., Hoyos, S., Silva-Martinez, J., & Sanchez-Sinencio, E.
(2008).
Applications of multipath transform-domain charge-sampling wide-band receivers. IEEE Transactions on Circuits and Systems - II - Express Briefs.
55(4), 309-313.
-
Hoyos, S., & Sadler, B. M.
(2007).
UWB mixed-signal transform-domain direct-sequence receiver. IEEE Transactions on Wireless Communications.
6(8), 3038-3046.
-
Hoyos, S., Sadler, B. M., & Arce, G. R.
(2006).
Broadband multicarrier communication receiver based on analog to digital conversion in the frequency domain. IEEE Transactions on Wireless Communications.
5(2), 652-661.
-
Hoyos, S., Sadler, B. M., & Arce, G. R.
(2005).
Monobit digital receivers for ultrawideband communications. IEEE Transactions on Wireless Communications.
4(4), 1337-1344.
-
Hoyos, S., Bacca, J., & Arce, G. R.
(2005).
Spectral Design of Weighted Median Filters: A General Iterative Approach. IEEE Transactions on Signal Processing.
53(3), 1045-1056.
-
Hoyos, S., & Sadler, B. M.
(2005).
Ultra-Wideband Analog-To-Digital Conversion Via Signal Expansion. IEEE Transactions on Vehicular Technology.
54(5), 1609-1622.
-
Hoyos, S., Li, Y., Bacca, J., & Arce, G. R.
(2004).
Weighted Median Filters Admitting Complex-Valued Weights and Their Optimization. IEEE Transactions on Signal Processing.
52(10), 2776-2787.
-
Hoyos, S., Garcia, J. A., & Arce, G. R.
(2004).
Mixed-Signal Equalization Architectures for Printed Circuit Board Channels. 51(2), 264-274.
-
Yi, I., Kaile, S. K., Zhu, Y., Diaz, J., Hoyos, S., & Palermo, S.
(2024).
A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET. PP(99), 1-12.
-
chapter
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Silva-Martinez, J., Silva-Rivas, F., Lu, C., Mincey, J., & Hoyos, S.
(2014).
Digitally-Based Calibration Techniques for RF Sigma Delta Modulators. SATELLITE COMMUNICATIONS AND NAVIGATION SYSTEMS.
Carbone, P., Kiaei, S., & Xu, F. (Eds.),
DESIGN, MODELING AND TESTING OF DATA CONVERTERS.
(pp. 119-141).
Springer Nature.
-
Silva-Martinez, J., Lu, C. Y., Silva-Rivas, F., Onabajo, M., & Hoyos, S.
(2011).
Broadband High-Resolution 200 MHz Bandpass SigmaDelta Modulator with a Software-Based Calibration Scheme. Iniewski, K. (Eds.),
CMOS Nanoelectronics: Analog and RF VSLI Circuits.
McGraw Hill Professional, Access Engineering.
-
Hoyos, S.
(2011).
OFDM Transform-Domain Receivers for Multi-Standard Communications. MULTI-MODE/MULTI-BAND RF TRANSCEIVERS FOR WIRELESS COMMUNICATIONS: ADVANCED TECHNIQUES, ARCHITECTURES, AND TRENDS.
(pp. 189-217).
-
Hoyos, S.
(2010).
OFDM TransformDomain Receivers for MultiStandard Communications. Multi-Mode/Multi-Band RF Transceivers for Wireless Communications.
(pp. 187-217).
Wiley.
-
Hoyos, S., & Sadler, B. M.
(2006).
MixedSignal Ultrawideband Communications Receivers. Ultra-Wideband Wireless Communications and Networks.
(pp. 103-126).
Wiley.
-
Silva-Martinez, J., Silva-Rivas, F., Lu, C., Mincey, J., & Hoyos, S.
(2014).
Digitally-Based Calibration Techniques for RF Sigma Delta Modulators. SATELLITE COMMUNICATIONS AND NAVIGATION SYSTEMS.
Carbone, P., Kiaei, S., & Xu, F. (Eds.),
DESIGN, MODELING AND TESTING OF DATA CONVERTERS.
(pp. 119-141).
Springer Nature.
-
conference paper
-
Zhu, Y., Cai, S., Kiran, S., Fan, Y., Chang, P., Hoyos, S., & Palermo, S.
(2020).
A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS. 1-4.
-
Diaz, J., Kiran, S., Palermo, S., & Hoyos, S.
(2019).
Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture. The ... Midwest Symposium on Circuits and Systems conference proceedings : MWSCAS. Midwest Symposium on Circuits and Systems.
1151-1154.
-
Kiran, S., Cai, S., Luo, Y., Hoyos, S., & Palermo, S.
(2019).
A 32 Gb/s ADC-Based PAM-4 Receiver with 2-bit/Stage SAR ADC and Partially-Unrolled DFE. Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference.
1-4.
-
Diaz, J., Zavareh, A. T., Boampong, L., & Hoyos, S.
(2019).
Blocker-Tolerant RF-to-Digital Linearization With a Very Nonlinear Auxiliary Path. The ... Midwest Symposium on Circuits and Systems conference proceedings : MWSCAS. Midwest Symposium on Circuits and Systems.
548-551.
-
Zavareh, A. T., & Hoyos, S.
(2018).
The Spectral Calibration of Swept-Source Optical Coherence Tomography Systems Using Unscented Kalman Filter. 93-96.
-
Kiran, S., Cai, S., Luo, Y., Hoyos, S., & Palermo, S.
(2018).
A 32 Gb/s ADC-Based PAM-4 Receiver with 2-bit/Stage SAR ADC and Partially-Unrolled DFE. 1-4.
-
Duran, E., Hoyos, S., & Jo, J.
(2018).
Cross-Level Sampling for Bandwidth Effective Time Domain Fluorescence Lifetime Imaging Implementation (10499-48). Proceedings of SPIE.
104991n.
-
Zavareh, A. T., Diaz, J., & Hoyos, S.
(2018).
Dual-Path Component Based Digital Receiver Linearization With a Very Non-linear Auxiliary Path. 1-4.
-
Kiran, S., Cai, S., Hoyos, S., & Palermo, S.
(2018).
Statistical Modeling of Non-Linearity in Decision Feedback Equalizer-Based Mixed-Signal Receivers. 29-31.
-
Zavareh, A. T., Barajas, O., & Hoyos, S.
(2017).
AN EFFICIENT ESTIMATION ALGORITHM FOR THE CALIBRATION OF LOW-COST SS-OCT SYSTEMS. Proceedings / IEEE International Symposium on Biomedical Imaging: from nano to macro. IEEE International Symposium on Biomedical Imaging.
1169-1172.
-
Barajas, O., Zavareh, A. T., & Hoyos, S.
(2017).
Towards an On-chip Signal Processing Solution for the Online Calibration of SS-OCT Systems. IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems.
84-87.
-
Zhou, J., Wang, Z., & Hoyos, S.
(2016).
Compressed Power Spectral Density Estimation via Group-Based Total Variation Minimization. IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation.
7-10.
-
Zavareh, A. T., Barajas, O., Serafino, M., Jo, J., Applegate, B., Sadler, B. M., & Hoyos, S.
(2016).
A Novel Continuous Time Ternary Encoding Based SS-OCT Calibration. 5-8.
-
Shafik, A., Tabasy, E. Z., Cai, S., Lee, K., Hoyos, S., & Palermo, S.
(2015).
A 10Gb/s Hybrid ADC-Based Receiver with Embedded 3-Tap Analog FFE and Dynamically-Enabled Digital Equalization in 65nm CMOS. Digest of technical papers / IEEE International Solid-State Circuits Conference. IEEE International Solid-State Circuits Conference.
62-U79.
-
Cai, S., Tabasy, E. Z., Shafik, A., Kiran, S., Hoyos, S., & Palermo, S.
(2015).
A 25GS/s 6b TI Binary Search ADC with Soft-Decision Selection in 65nm CMOS. c158-c159.
-
Kiran, S., Hoyos, S., & Palermo, S.
(2014).
A Single Parity Check Forward Error Correction Method for High Speed I/O. 652-655.
-
Zhou, J., & Hoyos, S.
(2014).
Asynchronous Compressive Multi-Channel Radar for Interference-Robust Vehicle Collision Avoidance Systems. 1-4.
-
Cai, S., Shafik, A., Kiran, S., Tabasy, E. Z., Hoyos, S., & Palermo, S.
(2014).
Statistical Modeling of Metastability in ADC-Based Serial I/O Receivers. 39-42.
-
Zhou, J., & Hoyos, S.
(2013).
Asynchronous Binary Compressive Sensing for Wireless Body Sensor Networks. 121-126.
-
Tabasy, E. Z., Shafik, A., Lee, K., Hoyos, S., & Palermo, S.
(2013).
A 6b 10GS/s TI-SAR ADC with embedded 2-tap FFE/1-tap DFE in 65nm CMOS
-
Zhou, J., Palermo, S., Sadler, B. M., & Hoyos, S.
(2013).
Asynchronous Compressive Sensing in Radar Systems. 1-4.
-
Zhou, J., He, Y., Chirala, M., Sadler, B. M., & Hoyos, S.
(2013).
COMPRESSED DIGITAL BEAMFORMER WITH ASYNCHRONOUS SAMPLING FOR ULTRASOUND IMAGING. Proceedings of the ... IEEE International Conference on Acoustics, Speech, and Signal Processing / sponsored by the Institute of Electrical and Electronics Engineers Signal Processing Society. ICASSP (Conference).
1056-1060.
-
Tabasy, E. Z., Shafik, A., Huang, S., Yang, N., Hoyos, S., & Palermo, S.
(2012).
A 6b 1.6GS/s ADC with Redundant Cycle 1-Tap Embedded DFE in 90nm CMOS. Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference.
1-4.
-
Saad, R., & Hoyos, S.
(2011).
Sensitivity Analysis of Pulse-Width Jitter Induced Noise in Continuous-Time Delta-Sigma Modulators to Out-of-Band Blockers in Wireless Receivers. IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems.
1636-1639.
-
Yu, Z., & Hoyos, S.
(2009).
Compressive Spectrum Sensing Front-ends for Cognitive Radios. Conference proceedings / IEEE International Conference on Systems, Man, and Cybernetics. IEEE International Conference on Systems, Man, and Cybernetics.
1899-1904.
-
Lo, Y., Chen, H., Silva-Martinez, J., & Hoyos, S.
(2009).
A 1.8V, Sub-mW, Over 100% Locking Range, Divide-by-3 and 7 Complementary-Injection-Locked 4 GHz Frequency Divider. Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference.
259-262.
-
Yu, Z., & Hoyos, S.
(2009).
Digitally assisted Analog Compressive Sensing. 1-4.
-
Chen, X. i., Silva-Martinez, J., & Hoyos, S.
(2008).
A CMOS Differential Noise Cancelling Low Noise Transconductance Amplifier. 53-56.
-
Hoyos, S., Tsang, C. W., Vanderhaegen, J., Chiu, Y., Aibara, Y., Khorramabadi, H., & Nikolic, B.
(2008).
A 15 MHz square 600 MHz, 20 mW, 0.38 mm(2), Fast Coarse Locking Digital DLL in 0.13 mu m CMOS. European Solid-State Circuits Conference.
90-93.
-
Tsang, C., Chiu, Y., Vanderhaegen, J., Hoyos, S., Chen, C., Brodersen, R., & Nikolic, B.
(2008).
Background ADC Calibration in Digital Domain. Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference.
301-+.
-
Prakasam, P. K., Kulkarni, M., Chen, X., Hoyos, S., & Sadler, B. M.
(2008).
Emerging technologies in software defined receivers. IEEE Radio and Wireless Symposium, RWS.
719-+.
-
Yu, Z., Hoyos, S., & Sadler, B. M.
(2008).
Mixed-signal parallel Compressed Sensing and reception for Cognitive Radio. Proceedings of the ... IEEE International Conference on Acoustics, Speech, and Signal Processing / sponsored by the Institute of Electrical and Electronics Engineers Signal Processing Society. ICASSP (Conference).
3861-+.
-
Wang, Z., Arce, G. R., Sadler, B. M., Paredes, J. L., Hoyos, S., & Yu, Z.
(2008).
Compressed UWB signal detection with narrowband interference mitigation. 157-+.
-
Hoyos, S., & Sadler, B. M.
(2006).
Frequency-Domain Implementation of the Transmitted-Reference Ultra-Wideband Receiver. IEEE Transactions on Microwave Theory and Techniques.
1745-1753.
-
Hoyos, S., & Sadler, B. M.
(2005).
UWB Mixed-Signal Transform-Domain Receiver Front-End Architectures. 1073-1077.
-
Hoyos, S., Sadler, B. M., & Arce, G. R.
(2005).
Ultra-Wideband Multicarrier Communication Receiver Based on Analog to Digital Conversion in the Frequency Domain. IEEE Wireless Communications and Networking Conference, WCNC.
782-787.
-
Hoyos, S., Sadler, B. M., & Arce, G. R.
(2004).
High-Speed A/D Conversion for Ultra-Wideband Signals Based on Signal Projection over Basis Functions. Proceedings of the ... IEEE International Conference on Acoustics, Speech, and Signal Processing / sponsored by the Institute of Electrical and Electronics Engineers Signal Processing Society. ICASSP (Conference).
iv-537-iv-540.
-
Rodriguez, J. B., Hoyos, S., Li, Y., & Arce, G. R.
(2004).
Weighted Median Based Filters for the Complex Domain. Proceedings of the ... IEEE International Conference on Acoustics, Speech, and Signal Processing / sponsored by the Institute of Electrical and Electronics Engineers Signal Processing Society. ICASSP (Conference).
ii-909-ii-912.
-
Hoyos, S., Sadler, B. M., & Arce, G. R.
(2003).
Analog to Digital Conversion of Ultra-Wideband Signals in Orthogonal Spaces. 47-51.
-
Hoyos, S., Sadler, B. M., & Arce, G. R.
(2003).
Dithering and Modulation in Mono-bit Digital Receivers for Ultra-Wideband Communications. 71-75.
-
Hoyos, S., Garcia, J., & Arce, G.
(2002).
Mixed-Signal Equalization Architectures for Printed Circuit Board Channels. Proceedings of the ... IEEE International Conference on Acoustics, Speech, and Signal Processing / sponsored by the Institute of Electrical and Electronics Engineers Signal Processing Society. ICASSP (Conference).
iv-3768-iv-3771.
-
Zhu, Y., Cai, S., Kiran, S., Fan, Y., Chang, P., Hoyos, S., & Palermo, S.
(2020).
A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS. 1-4.
-
patent
-
Hoyos, S., Pacheco, B., & Zavareh, A. T.
(2021).
Electronic device for automatic calibration of swept-source optical coherence tomography systems
-
Ahmed, R., Hoyos, S., & Silva-martinez, J.
(2012).
Jitter cancellation method for continuous-time sigma-delta modulators
-
Hoyos, S., Pacheco, B., & Zavareh, A. T.
(2021).
Electronic device for automatic calibration of swept-source optical coherence tomography systems
Research
principal investigator on
- Jitter-Tolerant Multi-Carrier ADC-Based Serial Link Architectures awarded by National Science Foundation - (Arlington, Virginia, United States) 2019 - 2022
- I-Corps: Low-Complexity Asynchronous Re-sampler for Optical Coherence Tomography awarded by National Science Foundation - (Arlington, Virginia, United States) 2017 - 2019
- Blocker-Tolerant Ultra-wideband Cognitive Spectrum Sensor awarded by National Science Foundation - (Arlington, Virginia, United States) 2016 - 2019
Teaching
teaching activities
- ECEN214 Elec Circuit Theory Instructor
- ECEN215 Prin Of Electrical Engr Instructor
- ECEN303 Random Signals & Systems Instructor
- ECEN325 Electronics Instructor
- ECEN326 Electronic Circuits Instructor
- ECEN485 Directed Studies Instructor
- ECEN489 Sptp: Data Conv Sys & Circ Instructor
- ECEN491 Research Instructor
- ECEN610 Mixed-signal Interfaces Instructor
- ECEN665 Integrated Cmos Rf Circt Instructor
- ECEN681 Seminar-ams Instructor
- ECEN684 Professional Internship Instructor
- ECEN685 Directed Studies Instructor
- ECEN691 Research Instructor
Works By Students
chaired theses and dissertations
-
Abdel Ghany, Ehab (2012-12). Linearity and Noise Improvement Techniques Employing Low Power in Analog and RF Circuits and Systems.
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Ahmed, Ramy 1981- (2012-12). Jitter-Tolerance and Blocker-Tolerance of Delta-Sigma Analog-to-Digital Converters for Saw-Less Multi-Standard Receivers.
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Boampong, Lester (2018-01). Auxiliary-Path-Assisted Digital Linearization of Wideband Wireless Receivers.
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Chen, XI (2010-01). DESIGN OF THE TRANSCONDUCTANCE AMPLIFIER FOR FREQUENCY DOMAIN SAMPLING RECEIVER.
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Chen, Xi (2012-07). Sub-Nyquist Rate Sampling Data Acquisition Systems Based on Compressive Sensing.
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Gupta, Robin (2017-12). Wide-Dynamic Range Image Sensor Prototype Based On Digital Readout Integrated Circuit.
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Kotte Prakasam, Pradeep (2010-07). Joint synchronization and calibration of multi-channel transform-domain charge sampling receivers.
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Kulkarni, Mandar Shashikant (2009-05). Implementation of a 1GHZ frontend using transform domain charge sampling techniques.
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Pacheco Barajas, Oscar Joseu (2017-08). Highly Efficient Spectral Calibration Methods for Swept-Source Optical Coherence Tomography.
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Pentakota, Krishna Anand Santosh Spikanth (2011-10). Digitally Assisted Multi-Channel Receivers.
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Raviprakash, Karthik (2010-10). Reduced Area Discrete-Time Down-Sampling Filter Embedded With Windowed Integration Samplers.
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Yu, Zhuizhuan (2012-07). Digitally-Assisted Mixed-Signal Wideband Compressive Sensing.
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Zhou, Jun (2014-05). Sparsity-Aware Low-Power ADC Architecture with Advanced Reconstruction Algorithms.
Background
education and training
- Ph.D. in Electrical Engineering, University of Delaware - (Newark, Delaware, United States) 2004
- M.E. in Electrical Engineering, University of Delaware - (Newark, Delaware, United States) 2002
- B.E. in Electronic Engineering, Pontifical Xavierian University - (Bogotá, Colombia) 2000
- University of California, Berkeley - (Berkeley, California, United States) , Postdoctoral Training 2006
Contact
first name
- Sebastian
has last name
- Hoyos
mailing address
-
Texas A&M University
Electrical Engineering
3128 TAMU
College Station, TX 77843-3128
USA
Other
- hoyos@tamu.edu