A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET Academic Article

authors

• Hoyos, Sebastian
• Palermo, Samuel

published proceedings

• IEEE JOURNAL OF SOLID-STATE CIRCUITS

author list (cited authors)

• Zhu, Y., Diaz, J., Kaile, S. K., Yi, I., Liu, T., Hoyos, S., & Palermo, S.

citation count

• 0

complete list of authors

• Zhu, Yuanming||Diaz, Julian Camilo Gomez||Kaile, Srujan Kumar||Yi, Il-Min||Liu, Tong||Hoyos, Sebastian||Palermo, Samuel

publication date

• March 2023

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Journal of Solid-State Circuits  Journal

keywords

• Analog-to-digital Converter (ADC)
• Continuous-time Linear Equalizer (ctle)
• Jitter
• Multicarrier Signaling
• Pipelined-successive Approximation Register (sar)
• Receiver Front-end (rxfe)

Digital Object Identifier (DOI)

• 10.1109/JSSC.2022.3226489

start page

• 662

end page

• 676

volume

• 58

issue

• 3

URL

• http://dx.doi.org/10.1109/jssc.2022.3226489