A 25GS/s 6b TI Binary Search ADC with Soft-Decision Selection in 65nm CMOS Conference Paper uri icon

abstract

  • 2015 JSAP. A 25GS/s 8-way time-interleaved binary search ADC employs a novel soft-decision selection algorithm to improve metastability tolerance and relax T/H settling requirements. The T/H design is further relaxed with reduced loading from a new shared-input three comparator structure. Fabricated in GP 65nm CMOS, the ADC achieves 4.62-bits ENOB at Nyquist and 143 fJ/conv.-step FOM, while consuming 88mW and occupying 0.24mm2 core ADC area.

name of conference

  • 2015 Symposium on VLSI Circuits (VLSI Circuits)

published proceedings

  • 2015 SYMPOSIUM ON VLSI CIRCUITS (VLSI CIRCUITS)

author list (cited authors)

  • Cai, S., Tabasy, E. Z., Shafik, A., Kiran, S., Hoyos, S., & Palermo, S.

citation count

  • 13

complete list of authors

  • Cai, Shengchan||Tabasy, Ehsan Zhian||Shafik, Ayman||Kiran, Shiva||Hoyos, Sebastian||Palermo, Samuel

publication date

  • January 2015