publication venue for
- Observability Driven Path Generation for Delay Test Coverage Improvement in Scan Limited Circuits 2020
- Mixed structural-functional path delay test generation and compaction 2013
- Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling 2013
- A low overhead built-in delay testing with voltage and frequency adaptation for variation resilience 2012
- Challenges in Delay Testing of Integrated Circuits 2009
- Built-In Proactive Tuning System for Circuit Aging Resilience 2008
- Timing Failure Analysis of Commercial CPUs Under Operating Stress 2006
- Adaptive Design for Performance-Optimized Robustness 2006
- A fast algorithm for critical path tracing in VLSI digital circuits 2005
- CROWNE: Current ratio outliers with neighbor estimator 2003
-
Chip level power supply partitioning for I
DDQ testing using built-in current sensors 2003 - CodSim - A combined delay fault simulator 2003
- CodSim - a combined delay fault simulator 2003
- Neighbor current ratio (NCR): a new metric for I/sub DDQ/ data analysis 2002