Accurate fault modeling and fault simulation of resistive bridges Conference Paper

abstract

• 1998 IEEE. This paper presents accurate fault models, an accurate fault simulation technique, and a new fault coverage metric for resistive bridging faults in gate level combinational circuits at nominal and reduced power supply voltages. We show that some faults have unusual behavior, which has been observed in practice. On the ISCAS85 benchmark circuits we show that a zeroohm bridge fault model can be quite optimistic in terms of coverage of voltage-Testable bridging faults.

name of conference

• Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)

authors

• Walker, Duncan

published proceedings

• 1998 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS

author list (cited authors)

• Sar-Dessai, V., & Walker, D.

citation count

• 20

complete list of authors

• Sar-Dessai, V||Walker, DMH

publication date

• January 1998

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems  Journal

keywords

• 40 Engineering
• 4008 Electrical Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/DFTVS.1998.732156

International Standard Book Number (ISBN) 10

• 0-8186-8832-7

International Standard Book Number (ISBN) 13

• 9780818688324

start page

• 102

end page

• 107

volume

• 1998-December

URL

• http://dx.doi.org/10.1109/dftvs.1998.732156