Conference Paper
RDF
pages:
-
A 15b, Sub-10ps Resolution, Low Dead Time, Wide Range Two-Stage TDC
-
A 16 channel time-multiplexed head coil array for functional MR imaging
-
A 16-32GHz RF Silicon Photonic Receiver with 22nm FD-SOI CMOS Driver
-
A 16-bit/spl times/16-bit MAC design using fast 5:2 compressors
-
A 16/32 Gb/s Dual-Mode NRZ/PAM4 SerDes in 65nm CMOS
-
A 16mW, 2.23~2.45GHz Fully Integrated PLL with Novel Prescaler and Loop Filter in 0.35m CMOS
-
A 1MW Electron Beam Heated Radiatively Driven Wind Tunnel Experiment (Invited)
-
A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology
-
A 2-1100 MHz Wideband Low Noise Amplifier with 1.43 dB minimum Noise Figure
-
A 2-Layer Laser Multiplexed Photonic Network-on-Chip
-
A 2-Layer Laser Multiplexed Photonic Network-on-Chip
-
A 2-STAGE HUMAN BRAIN MRI SEGMENTATION SCHEME USING FUZZY LOGIC
-
A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling
-
A 2.1GHz 1.3V 5mW programmable Q-enhancement LC Bandpass Biquad in 0.35 mu m CMOS
-
A 2.3-3.9 GHz Fractional-N Frequency Synthesizer with Charge Pump and TDC Calibration for Reduced Reference and Fractional Spurs
-
A 2.75-6.25GHz Low-Phase-Noise Quadrature VCO Based on a Dual-Mode Ring Resonator in 65nm CMOS
-
A 2.7V, 1.8GHz, 4thorder tunable LC bandpass filter with ±0.25dB passband ripple
-
A 2.8-4.3GHz Wideband Fractional-N Sub-sampling Synthesizer with-112.5dBc/Hz In-Band Phase Noise
-
A 20 Gb/s triple-mode (PAM-2, PAM-4, and duobinary) transmitter
-
A 20 Years Systemic Study of Drilling Practices in a Geothermal Venture Reveals Insightful Findings
-
A 200-GHz Triple-Push Oscillator in 65-nm CMOS with Design Techniques for Enhancing DC-to-RF Efficiency
-
A 200MSPS Time-Interleaved 12-bit ADC System with Digital Calibration
-
A 20Gb/s Triple-Mode (PAM-2, PAM-4, and Duobinary)Transmitter
-
A 20MHz BW 68dB DR CT $Delta sum$ ADC Based on a Multi-Bit Time-Domain Quantizer and Feedback Element
-
A 22 Gb/s Directly Modulated Optical Injection-Locked Quantum-Dot Microring Laser Transmitter with Integrated CMOS Driver
-
A 22.2-43 GHz Gate-Drain Mutually Induced Feedback Low Noise Amplifier in 28-nm CMOS
-
A 220-nA Quiescent Current Capacitor-Less Low-Dropout Regulator with Improved Recovery Time
-
A 24 circularly polarized antenna Array for WLAN applications
-
A 24 GHz Indirect VCO in 0.18 mu m CMOS Technology
-
A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS
pages: