A 16mW, 2.23~2.45GHz Fully Integrated PLL with Novel Prescaler and Loop Filter in 0.35m CMOS
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abstract
A 3mW inherently glitch-free phase-switching prescaler and a loop filter with a 0.2mW capacitance multiplier are proposed for a PLL synthesizer in 0.35m CMOS. The noise folding is minimized by optimal design of modulator and minimized PLL nonlinearities. The synthesizer has a 9.4% tuning range of 2.23-2.45GHz. The phase noise is -90dBc/Hz at 10kHz, and -128dBe/Hz at 10MHz offset.
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IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003