publication venue for
- Front-end-of-line attacks in split manufacturing 2017
- CamoPerturb 2016
- Security of neuromorphic computing 2016
- Shielding and securing integrated circuits with sensors 2014
- Hardware security: Threat models and metrics 2013
- Clustering-based simultaneous task and voltage scheduling for NoC systems 2010
- Introduction to GPU programming for EDA 2009
- Nonvolatile memristor memory: Device characteristics and design implications 2009
- SRAM dynamic stability: Theory, variability and analysis 2008
- Impedance extraction for 3-D structures with multiple dielectrics using preconditioned boundary element method 2007
- Modeling, optimization and control of rotary traveling-wave oscillator 2007
- Unified adaptivity optimization of clock and logic signals 2007
- A New RLC Buffer Insertion Algorithm 2006
- Clock Buffer Polarity Assignment for Power Noise Reduction 2006
- Combinatorial Algorithms for Fast Clock Mesh Optimization 2006
- Fast Decap Allocation Based on Algebraic Multigrid 2006
- Information Theoretic Approach to Address Delay and Reliability in Long On-Chip Interconnects 2006
- Network Coding for Routability Improvement in VLSI 2006
- A metal and via maskset programmable VLSI design methodology using PLAs 2004
- A novel clock distribution and dynamic de-skewing methodology 2004
- Accurate estimation of global buffer delay within a floorplan 2004
- Exploiting level sensitive latches in wire pipelining 2004
- M-trie: an efficient approach to on-chip logic minimization 2004
- Analytical bound for unwanted clock skew due to wire width variation 2003
- Addressing the timing closure problem by integrating logic optimization and placement 2001
- A timing-constrained algorithm for simultaneous global routing of multiple nets 2000
- Cross-talk immune VLSI design using a network of PLAs embedded in a regular layout fabric 2000
- Optimal algorithm for area minimization of slicing floorplans 1995