Thin Film Transistors with Graded SiN x Gate Dielectrics Academic Article uri icon

abstract

  • This paper presents results on thin film transistors with graded SiNx gate dielectrics. All SiNx and a-Si:H films were prepared using 250°C plasma-enhanced chemical vapor deposition processes. Device characteristics such as mobility, threshold voltage, subthreshold slope, and on/off current are discussed. The graded gate dielectric thin film transistor (TFT) may have better or worse device performance compared with the single gate dielectric TFT, depending on the interface dielectric deposition condition. The interface SiNx deposition process influences the intensity density of states between the a-Si:H layer and the gate SiNx layer as well as the states between the first and the second (interface) SiNx layers. The stress mismatch between the first and the second SiNx layers also has a profound influence on TFT characteristics. © 1994, The Electrochemical Society, Inc. All rights reserved.

author list (cited authors)

  • Kuo, Y.

citation count

  • 13

publication date

  • April 1994