Architectural Simulations of a Fast, Source-Synchronous Ring-based Network-on-Chip Design Conference Paper uri icon

abstract

  • Recently, a new source-synchronous ring-based NoC architecture has been proposed, which runs significantly faster than the PEs and offers a high bandwidth and low contention free latency. Architectural simulations show that the original ring-based NoC design suffers from deadlock. In this paper, we explore the architectural aspects of the fast ring-based NoC after redesigning the routers used in the previous authors' work to avoid deadlock. Architectural results obtained on synthetic traffic demonstrate that the modified ring-based NoC has up to 3.5x lower latency and up to 2.9x higher maximum sustained injection rate compared with a state of the art mesh-based NoC. 2012 IEEE.

name of conference

  • 2012 IEEE 30th International Conference on Computer Design (ICCD)

published proceedings

  • 2012 IEEE 30TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD)

author list (cited authors)

  • Mandal, A., Khatri, S. P., & Mahapatra, R. N.

citation count

  • 2

complete list of authors

  • Mandal, Ayan||Khatri, Sunil P||Mahapatra, Rabi N

publication date

  • September 2012