publication venue for
- Low-Power, Resilient Interconnection with Orthogonal Latin Squares. 28:30-38. 2011
- Modeling power supply noise in delay testing. 24:226-234. 2007
- IC outlier identification using multiple test metrics. 22:586-595. 2005
- I-DDQ test: Will it survive the DSM challenge?. 19:8-16. 2002
- A reliability testing environment for off-the-shelf memory subsystems. 17:116-124. 2000