An Approach to Tolerate Process Related Variations in Memristor-Based Applications Conference Paper

abstract

• Memristors have been proposed to be used in a wide variety of applications ranging from neural networks to memory to digital logic. Like other electronic devices, memristors are also prone to process variations. We show that the effect of process induced variations in the thickness of the oxide layer of a memristor has a non-linear relationship with memristance. We analyze the effects of process variation on memristor-based threshold gates. We propose two algorithms to tolerate variations on memristance based on two different constraints. One is used to determine the memristance values for a given list of Boolean functions to tolerate a maximum amount of variation. The other is used to determine the list of Boolean functions that can tolerate a maximum amount of variation for given memristance values. Finally, we analyze the performance of memristor-based threshold gates to tolerate variations. 2011 IEEE.

name of conference

• 2011 24th Internatioal Conference on VLSI Design

authors

• Rajendran, Jeyavijayan

published proceedings

• 2011 24th Internatioal Conference on VLSI Design

author list (cited authors)

• Rajendran, J., Maenm, H., Karri, R., & Rose, G. S.

citation count

• 30

complete list of authors

• Rajendran, Jeyavijayan||Maenm, Harika||Karri, Ramesh||Rose, Garrett S

publication date

• January 2011

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• Proceedings of the IEEE International Conference on VLSI Design  Journal

Digital Object Identifier (DOI)

• 10.1109/vlsid.2011.49

International Standard Book Number (ISBN) 13

• 9780769543482

start page

• 18

end page

• 23

URL

• http://dx.doi.org/10.1109/vlsid.2011.49