Sneak-path Testing of Memristor-based Memories Conference Paper uri icon

abstract

  • Memristors are an attractive option for use in future memory architectures due to their non-volatility, low power operation and compactness. Notwithstanding these advantages, memristors and memristor-based memories are prone to high defect densities due to the non-deterministic nature of nanoscale fabrication. As a first step, we will examine the defect mechanisms in memristors and develop efficient fault models. Next, the memory subsystem has to be tested. The typical approach to testing a memory subsystem entails testing one memory element at a time. This is time consuming and does not scale for dense, memristor-based memories. We propose an efficient testing technique to test memristor-based memories. The proposed scheme uses sneak-paths inherent in crossbar memories to test multiple memristors at the same time and thereby reduces the test time by 32%. 2013 IEEE.

name of conference

  • 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems

published proceedings

  • 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems

author list (cited authors)

  • Kannan, S., Rajendran, J., Karri, R., & Sinanoglu, O.

publication date

  • January 1, 2013 11:11 AM

publisher