On Improving the Security of Logic Locking Academic Article

abstract

• 1982-2012 IEEE. Due to globalization of integrated circuit (IC) design flow, rogue elements in the supply chain can pirate ICs, overbuild ICs, and insert hardware Trojans. EPIC locks the design by randomly inserting additional gates; only a correct key makes the design to produce correct outputs. We demonstrate that an attacker can decipher the locked netlist, in a time linear to the number of keys, by sensitizing the key-bits to the output. We then develop techniques to fix this vulnerability and make an attacker's effort truly exponential in the number of inserted keys. We introduce a new security metric and a method to deliver strong logic locking.

authors

• Rajendran, Jeyavijayan

published proceedings

• IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

altmetric score

• 3

author list (cited authors)

• Yasin, M., Rajendran, J. J., Sinanoglu, O., & Karri, R.

citation count

• 224

complete list of authors

• Yasin, Muhammad||Rajendran, Jeyavijayan JV||Sinanoglu, Ozgur||Karri, Ramesh

publication date

• September 2016

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems  Journal

keywords

• 40 Engineering
• 4009 Electronics, Sensors And Digital Hardware
• 46 Information And Computing Sciences
• 4604 Cybersecurity And Privacy

Digital Object Identifier (DOI)

• 10.1109/tcad.2015.2511144

start page

• 1411

end page

• 1424

volume

• 35

issue

• 9

URL

• http://dx.doi.org/10.1109/tcad.2015.2511144