IDDQtesting of input/output resources of SRAM-based FPGAs Academic Article

abstract

• This paper presents a quiescent current-based (IDDQ) approach for testing input/output resources in SRAM-based FPGAs. Input/output resources include input/output blocks (IOBs) and the I/O interconnect. Test generation and application strategies are proposed by taking into account the limited controllability of the I/O resources. Configuration of these resources requires that the test stimuli must be provided by internal (logic and routing) resources. A detailed presentation for testing the I/O resources of the Xilinx XC4000 family is given.

authors

• Walker, Duncan

published proceedings

• Proceedings of the Asian Test Symposium

author list (cited authors)

• Zhao, L., Walker, D., & Lombardi, F.

complete list of authors

• Zhao, L||Walker, DMH||Lombardi, F

publication date

• December 1999

published in

• Proceedings of the Asian Test Symposium  Journal

start page

• 375

end page

• 380