Low-density parity-check decoder architecture for high throughput optical fiber channels
Additional Document Info
A requirement-specific decoder design for forward error-correction in 2 Gbps optical fiber communication system is presented. Low-density parity-check codes are used to achieve high bit error rate performance. Several novel error- decoding architectures are proposed and their design configurations explored to identify optimal cost/performance design. Serial, parallel and scalable architectures are studied. The result is a scalable architecture that consists of 1.3 million CMOS gates running at 295 Mhz and it achieves a throughput of 2.51 Gbps.
name of conference
Proceedings 21st International Conference on Computer Design