Minimum Energy Near-Threshold Network of PLA Based Design Conference Paper

abstract

• In recent times, there has been a significant growth in applications for battery powered portable electronics, as well as low power sensor networks. While sub-threshold circuit design approaches can reduce the power consumption significantly, a design operating at sub-threshold voltages is not necessarily optimal in terms of energy consumption. In this paper, we describe a, technique to find the energy optimum VDD value for a design, and show that for minimum energy consumption, the circuit should be operated at VDD values which are above the NMOS threshold voltage value. We study this problem in the context of designing a circuit using a network of dynamic NOR-NOR PLAs. 2005 IEEE.

name of conference

• 2005 International Conference on Computer Design

authors

• Khatri, Sunil

published proceedings

• 2005 International Conference on Computer Design

author list (cited authors)

• Jayakumar, N., & Khatri, S. P.

citation count

• 4

complete list of authors

• Jayakumar, Nikhil||Khatri, Sunil P

publication date

• January 2005

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE International Conference on Computer Design - VLSI in Computers and Processors  Journal

keywords

• 7 Affordable And Clean Energy

Digital Object Identifier (DOI)

• 10.1109/iccd.2005.75

International Standard Book Number (ISBN) 10

• 0769524516

International Standard Book Number (ISBN) 13

• 9780769524511

start page

• 399

end page

• 404

volume

• 2005

URL

• http://dx.doi.org/10.1109/iccd.2005.75

user-defined tag

• 7 Affordable and Clean Energy