publication venue for
- Routing Perturbation for Enhanced Security in Split Manufacturing 2017
- Islands of Heaters: A Novel Thermal Management Framework for Photonic NoCs 2017
- Accelerating Statistical Static Timing Analysis Using Graphics Processing Units 2009
- Efficient Analytical Determination of the SEU-induced Pulse Shape 2009
- Fast Circuit Simulation on Graphics Processing Units 2009
- A new methodology for interconnect parasitics extraction considering photo-lithography effects 2007
- A global minimum clock distribution network augmentation algorithm for guaranteed clock skew yield 2007
- An O(mn) time algorithm for optimal buffer insertion of nets with m sinks 2006
- Controlling inductive cross-talk and power in off-chip buses using CODECs 2006
- Library cell layout with Alt-PSM compliance and composability 2005
- Making fast buffer insertion even faster via approximation techniques 2005
- Skew scheduling and clock routing for improved tolerance to process variations 2005
- Timing driven track routing considering coupling capacitance 2005
- Complexity analysis and speedup techniques for optimal buffer insertion with minimum cost 2004
- A place and route aware buffered steiner tree construction 2004
- Layer assignment for crosstalk risk minimization 2004
- Longest path selection for delay test under process variation 2004