The Challenges in Introducing PMOS Dual Channel in CMOS Processing Conference Paper uri icon


  • The benefit of a SiGe channel in the adjustment of the threshold voltage in PMOS devices is outlined. However, difficulties in the implementation make the full CMOS integration challenging. We examine these difficulties of implementation and the complexities of the processes. The issues are divided into two categories to better understand the complexity: active area related and complementary process related. In particular, the process issues associated with epitaxy, gate etch, silicide and lithography are particularly examined. It is concluded that the issues can be overcome with excellent transistor results.

author list (cited authors)

  • Harris, H. R., Majhi, P., Kirsch, P. D., Sivasubramani, P., Oh, J. W., & Song, S. C.

citation count

  • 0

publication date

  • December 2019