Threshold Voltage Shift Due to Charge Trapping in Dielectric-Gated AlGaN/GaN High Electron Mobility Transistors Examined in Au-Free Technology Academic Article uri icon

abstract

  • We report on the investigation of the charge trapping characteristics of dielectric-gated AlGaN/GaN high electron mobility transistors (HEMTs) with atomic layer deposited {
    m HfO}-{{2}} (Tetrakis-(ethylmethylamino)hafnium and {
    m H}-{{2}}{
    m O} precursors). The impact of process development and tool contamination in an Au-free 200-mm silicon CMOS line is discussed. The interfacial {
    m GaO}-{
    m x}{
    m N}
    m y layer is proposed to be the primary location of long time constant traps. We examine the impact of these trap states on threshold voltage engineering of the gate stack. Enhancement mode operation of HEMTs is demonstrated, and the stability of enhancement mode is discussed. © 1963-2012 IEEE.

author list (cited authors)

  • Johnson, D. W., Lee, R., Hill, R., Wong, M. H., Bersuker, G., Piner, E. L., Kirsch, P. D., & Harris, H. R.

citation count

  • 39

publication date

  • October 2013