A heuristic for peak power constrained design of network-on-chip (NoC) based multimode systems Conference Paper

abstract

• Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system components and routing of system communication affect system performance and power consumption. This research provides a heuristic to determine the neighborhood configuration for each component. By controlling the communication bandwidth allocation, simulation results with synthetic and real workloads indicate that our heuristic is able to control the peak power consumption, but at cost of throughput degradation. 2005 IEEE.

name of conference

• 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design

authors

• Kim, Eun
• Mahapatra, Rabinarayan

published proceedings

• 18TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS

altmetric score

• 3

author list (cited authors)

• Bhojwani, P., Mahapatra, R., Kim, E. J., & Chen, T.

citation count

• 11

complete list of authors

• Bhojwani, P||Mahapatra, R||Kim, EJ||Chen, T

publication date

• January 2005

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• Proceedings of the IEEE International Conference on VLSI Design  Journal

keywords

• 40 Engineering
• 4008 Electrical Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/ICVD.2005.12

International Standard Book Number (ISBN) 10

• 0-7695-2264-5

start page

• 124

end page

• 129

URL

• http%3A%2F%2Fdx.doi.org%2F10.1109%2Ficvd.2005.12