A heuristic for peak power constrained design of network-on-chip (NoC) based multimode systems
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Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system components and routing of system communication affect system performance and power consumption. This research provides a heuristic to determine the neighborhood configuration for each component. By controlling the communication bandwidth allocation, simulation results with synthetic and real workloads indicate that our heuristic is able to control the peak power consumption, but at cost of throughput degradation. 2005 IEEE.
name of conference
18th International Conference on VLSI Design
18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
author list (cited authors)
Bhojwani, P., Mahapatra, R., Eun Jung Kim, .., & Chen, T.
complete list of authors
Bhojwani, P||Mahapatra, R||Chen, T