publication venue for
- A Hardware-Assisted Energy-Efficient Processing Model for Activity Recognition Using Wearables. 21:58-27. 2016
- Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory. 21:1-25. 2016
- Parallel Power Grid Analysis Based on Enlarged Partitions. 21:1-21. 2016
- Use It or Lose It. 20:1-26. 2015
- WaveSync. 19:1-22. 2014
- Understanding SRAM Stability via Bifurcation Analysis. 19:1-25. 2014
- In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches. 18:1-21. 2013
- GPU-Based Parallelization for Fast Circuit Optimization. 16:24-14. 2011
- Locality-Driven Parallel Static Analysis for Power Delivery Networks. 16:1-17. 2011
- A Simultaneous Input Vector Control and Circuit Modification Technique to Reduce Leakage with Zero Delay Penalty. 16:9-20. 2010
- FPGA-based hardware acceleration for Boolean satisfiability. 14:33-11. 2009
- Resource sharing among mutually exclusive sum-of-product blocks for area reduction. 13:51-7. 2008
- SAT-based ATPG using multilevel compatible don't-cares. 13:24-18. 2008
- I DDX -based test methods. 9:159-198. 2004
- A circuit level fault model for resistive bridges. 8:546-559. 2003