High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique
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A low drop-out (LDO) regulator with a feed-forward ripple cancellation (FFRC) technique is proposed in this paper. The FFRC-LDO achieves a high power-supply rejection (PSR) over a wide frequency range. Complete analysis and design steps of the FFRC-LDO are presented in this paper. Kelvin connection is also used to increase the gainbandwidth of the LDO allowing for faster transient performance. The LDO is implemented in 0.13 μm CMOS technology and achieves a PSR better than - 56 dB up to 10 MHz for load currents up to 25 mA. Load regulation of 1.2 mV for a 25 mA step is measured, and the whole LDO consumes a quiescent current of 50 μA with a bandgap reference circuit included. To our knowledge, this is the first LDO that achieves such a high PSR up to 10 MHz. © 2006 IEEE.
IEEE Journal of Solid-State Circuits
author list (cited authors)
El-Nozahi, M., Amer, A., Torres, J., Entesari, K., & Sanchez-Sinencio, E.
complete list of authors
El-Nozahi, Mohamed||Amer, Ahmed||Torres, Joselyn||Entesari, Kamran||Sanchez-Sinencio, Edgar