High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique Academic Article

abstract

• A low drop-out (LDO) regulator with a feed-forward ripple cancellation (FFRC) technique is proposed in this paper. The FFRC-LDO achieves a high power-supply rejection (PSR) over a wide frequency range. Complete analysis and design steps of the FFRC-LDO are presented in this paper. Kelvin connection is also used to increase the gainbandwidth of the LDO allowing for faster transient performance. The LDO is implemented in 0.13 m CMOS technology and achieves a PSR better than - 56 dB up to 10 MHz for load currents up to 25 mA. Load regulation of 1.2 mV for a 25 mA step is measured, and the whole LDO consumes a quiescent current of 50 A with a bandgap reference circuit included. To our knowledge, this is the first LDO that achieves such a high PSR up to 10 MHz. 2006 IEEE.

authors

• Entesari, Kamran

published proceedings

• IEEE JOURNAL OF SOLID-STATE CIRCUITS

altmetric score

• 9

author list (cited authors)

• El-Nozahi, M., Amer, A., Torres, J., Entesari, K., & Sanchez-Sinencio, E.

citation count

• 178

complete list of authors

• El-Nozahi, Mohamed||Amer, Ahmed||Torres, Joselyn||Entesari, Kamran||Sanchez-Sinencio, Edgar

publication date

• March 2010

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Journal of Solid-State Circuits  Journal

keywords

• Cmos
• Dc-dc Converters
• Feed-forward Ripple Cancellation
• Low Drop-out Regulator
• Power-supply Rejection

Digital Object Identifier (DOI)

• 10.1109/JSSC.2009.2039685

start page

• 565

end page

• 577

volume

• 45

issue

• 3

URL

• http://dx.doi.org/10.1109/jssc.2009.2039685