Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction Academic Article

authors

• Rajendran, Jeyavijayan

published proceedings

• IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING

author list (cited authors)

• Jayasankaran, N. G., Borbon, A. S., Sanchez-Sinencio, E., Hu, J., & Rajendran, J.

citation count

• 4

complete list of authors

• Jayasankaran, NG||Borbon, A Sanabria||Sanchez-Sinencio, E||Hu, J||Rajendran, J

publication date

• January 2022

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Emerging Topics in Computing  Journal

keywords

• Aging Effect
• Analog Circuits
• Analog Security
• Digital Circuits
• Integrated Circuits
• Logic Gates
• Logic Locking
• Optimization
• Process Variations
• Security
• Sfll
• Transistors
• Tuning

Digital Object Identifier (DOI)

• 10.1109/TETC.2020.3025561

start page

• 386

end page

• 403

volume

• 10

issue

• 1

URL

• http://dx.doi.org/10.1109/tetc.2020.3025561