Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges Academic Article

authors

• Rajendran, Jeyavijayan

published proceedings

• IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

author list (cited authors)

• Sanabria-Borbon, A., Jayasankaran, N. G., Hu, J., Rajendran, J., & Sanchez-Sinencio, E.

citation count

• 5

complete list of authors

• Sanabria-Borbon, A||Jayasankaran, NG||Hu, J||Rajendran, J||Sanchez-Sinencio, E

publication date

• January 2021

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

keywords

• Analog
• Analog Circuits
• Attacks
• Current Mirrors
• Defense
• Hardware Security
• Logic Gates
• Performance Evaluation
• Rf Ip Protection
• Security
• Supply Chains
• Threat Models
• Transistors

Digital Object Identifier (DOI)

• 10.1109/TCSII.2020.3040725

start page

• 36

end page

• 41

volume

• 68

issue

• 1

URL

• http://dx.doi.org/10.1109/tcsii.2020.3040725