Circuit design techniques for a gigahertz integer microprocessor Conference Paper

abstract

• Using highly optimized, custom circuits and fast dynamic array control structures, a small team of designers at the IBM Austin Research Laboratory has developed a one gigahertz microprocessor [2]. This paper describes the custom datapath circuit technology employed in this design. Particular attention was paid in the design process to the trade-off between performance and noise-margins. To achieve the low circuit latencies, highly-optimized and noise-characterized delayed-reset domino circuits were employed in the datapath elements of the gigahertz design.

name of conference

• Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273)

authors

• Nowka, Kevin

published proceedings

• INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS

author list (cited authors)

• Nowka, K. J., & Galambos, T.

citation count

• 49

complete list of authors

• Nowka, KJ||Galambos, T

publication date

• January 1998

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE International Conference on Computer Design - VLSI in Computers and Processors  Journal

keywords

• 33 Built Environment And Design
• 3303 Design
• 40 Engineering
• 4008 Electrical Engineering
• 4009 Electronics, Sensors And Digital Hardware
• 4010 Engineering Practice And Education

Digital Object Identifier (DOI)

• 10.1109/ICCD.1998.727017

International Standard Book Number (ISBN) 10

• 0-8186-9099-2

start page

• 11

end page

• 16

URL

• http://dx.doi.org/10.1109/iccd.1998.727017