Wide limited switch dynamic logic circuit implementations Conference Paper

abstract

• Wide circuit implementation of Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, with a modified pseudo-nMOS style load has been studied in this paper. A conventional two levels of 8-way mux implementation and a wide 64-way mux implementation of the 64-bit rotator circuit were used in the analysis. The resultant wide circuit implementation consumes less power, maintains robustness to noise and power rail bounce and reduces the pipeline depth to a single stage. The effect of process variation on circuit performance is evaluated. Based on the analysis, a new circuit style known as hybrid LSDL has been proposed. 2006 IEEE.

name of conference

• 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)

authors

• Nowka, Kevin

published proceedings

• 19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS

author list (cited authors)

• Sivagnaname, J., Ngo, H. C., Nowka, K. J., Montoye, R. K., & Brown, R. B.

citation count

• 9

complete list of authors

• Sivagnaname, J||Ngo, HC||Nowka, KJ||Montoye, RK||Brown, RB

publication date

• January 2005

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• Proceedings of the IEEE International Conference on VLSI Design  Journal

keywords

• 40 Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/vlsid.2006.171

International Standard Book Number (ISBN) 10

• 0-7695-2502-4

International Standard Book Number (ISBN) 13

• 9780769525020

start page

• 94

end page

• 99

volume

• 2006

URL

• http://dx.doi.org/10.1109/vlsid.2006.171