Comparing Leakage Reduction Techniques for an Asynchronous Network-on-Chip Router
Conference Paper
Overview
Research
Identity
Additional Document Info
Other
View All
Overview
abstract
2018 American Scientific Publishers All rights reserved. The Network-on-Chip (NoC) paradigm is now widely used to interconnect the processing elements (PEs) in a chip multiprocessor (CMP). It has been reported that the NoC consumes about a third of the total power consumption of the multi-core processor. To address this, asynchronous NoC routers have been proposed, to eliminate the clocking power associated with the NoC implementation, which is typically a large fraction of the NoC power consumption. In this work, we present a technique to reduce the standby power of a state-of-the-art asynchronous NoC router. In our approach, the router is put in a known input state when idle, and each gate in the unmodified router is replaced by a logically equivalent gate. The supply pin of this gate is connected to a PMOS device with a high threshold voltage in case its output in the idle state was 0. On the other hand, if the output of the unmodified gate in the idle state was 1, it is replaced by a logically equivalent gate whose ground terminal is connected to a NMOS device with a high threshold voltage. Our router is inserted in a NoC, and verified logically for correct routing functionality. We also simulated it at the circuit level using a 45 nm fabrication technology, and show that it has a low wake-up time from sleep, and a minimal steady-state routing delay (13%) and area (23%) overhead, and a 8.1 lower standby power, when compared to an unmodified asynchronous NoC router, which was also implemented. Furthermore, we compare our design approach to three traditional leakage reduction approaches found in the literature (multi-threshold, header-only and footer-only). Our design approach achieves the lowest leakage over all other design approaches. Our leakage improvement is achieved in part by using a novel method to control the leakage of the sleep driver chain used to drive the sleep signal, something which is not possible with traditional leakage reduction techniques. In this paper, we do not propose a new leakage control technique. Rather, we compare several existing techniques, while proposing a novel sleep driver chain circuit that improves the leakage performance for the router.
