Securing Processors Against Insider Attacks: A Circuit-Microarchitecture Co-Design Approach Academic Article uri icon


  • A joint circuit-architecture-level design approach is proposed that helps in preventing or detecting Trojan attacks. The performance impact of processor encryption depends on how often the security module is used. If a security module checks the instructions often, then processor encryption will have a high performance impact. The key size used for encryption increases as the detection sensitivity of detection technique increases. Apart from design size, power consumption and path-delays can also be used as metrics for detection sensitivity of a detection technique. Encrypting the entire pipeline will significantly impact processor's performance. Hence, we encrypt only some of the pipeline units depending up on the security modules in the processor. The TrustNet and DataWatch security modules are distributed, and hence multiple units are encrypted.

published proceedings

  • IEEE Design and Test

altmetric score

  • 11

author list (cited authors)

  • Rajendran, J., Kanuparthi, A. K., Karri, R., Addepalli, S. K., Zahran, M., & Ormazabal, G.

citation count

  • 23

complete list of authors

  • Rajendran, Jeyavijayan||Kanuparthi, Arun Karthik||Karri, Ramesh||Addepalli, Sateesh K||Zahran, Mohamed||Ormazabal, Gaston

publication date

  • January 2013