Application of defect simulation as a tool for more efficient failure analysis Academic Article uri icon

abstract

  • In modern VLSI processes, increasing process complexity has resulted in an exponential rise in the costs of thorough failure analysis. In this paper, we present a defect simulationbased failure analysis methodology, which can be used to significantly reduce both costs and turnaround time for failure analyses. The methodology is based on the ability to generate a defect dictionary, which can relate defect characteristics to some easily measurable symptoms of defect occurrence. Copyright 1994 John Wiley & Sons, Ltd.

published proceedings

  • Quality and Reliability Engineering International

author list (cited authors)

  • Griep, S., Khare, B., Lemme, R., Papenberg, U., SchmittLandsiedel, D., Maly, W., ... Zettler, T.

citation count

  • 4

complete list of authors

  • Griep, S||Khare, B||Lemme, R||Papenberg, U||Schmitt‐Landsiedel, D||Maly, W||Walker, DMH||Winnerl, J||Zettler, T

publication date

  • January 1994

publisher