A cost-effective multistage interconnection network with network overlapping and memory interleaving Academic Article

abstract

• In this paper, we propose a cost-effective design of circuit switching multistage interconnection networks (CSMINs). Increase of the network bandwidth and reduction of the network size (and thus low costs) are both accomplished by network over-lapping and memory interleaving (NOMI), instead of by increasing the number of switches or adding buffers. The NOMI and its control principle are described on the basis of the structure and interconnection functions of CSMIN's. Detailed accounts of both the network design and the drastic reduction in hardware costs are given. The impact of NOMI on system performance is also analyzed. 1985 IEEE

authors

• Liu, Jyh

published proceedings

• IEEE Transactions on Computers

altmetric score

• 3

author list (cited authors)

• Shin, K. G., & Liu, J.

citation count

• 4

complete list of authors

• Shin, KG||Liu, Jyh-Charn

publication date

• December 1985

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Computers  Journal

keywords

• 40 Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/tc.1985.6312208

start page

• 1088

end page

• 1101

volume

• C-34

issue

• 12

URL

• http://dx.doi.org/10.1109/tc.1985.6312208