The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier
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A recycling amplifier architecture based on the folded cascode transconductance amplifier is described. The proposed amplifier delivers an appreciably enhanced performance over that of the conventional folded. This is achieved by using previously idle devices in the signal path, which results in an enhanced transconductance, gain, and slew rate. Moreover, the input referred noise and offset analyses are included to demonstrate that the proposed modifications have no adverse effects on these design metrics. Transistor-level simulations and experimental results in TSMC 0.18 m CMOS process confirm the theoretical results. When compared to the conventional folded cascode, and for the same area and power budgets, the proposed amplifier has almost twice the bandwidth (134.2 MHz versus 70.7 MHz) and better than twice the slew rate (94.1 V s versus 42.1 V s) while driving the same 5.6 pF load. Also a gain enhancement of 7.6 dB is observed. 2006 IEEE.
IEEE Journal of Solid-State Circuits
author list (cited authors)
Assaad, R. S., & Silva-Martinez, J.
complete list of authors
Assaad, Rida S||Silva-Martinez, Jose