Gate First Band Edge High-k/Metal Stacks with EOT=0.74nm for 22nm Node nFETs Conference Paper

abstract

• We demonstrate for the first time a gate first high-k/metal gate (MG) nFET with EOT=0.74nm (Tinv=1.15nm), low V, =0.30V, high performance [Ion/Ioff=A/um) at 100(nA/urn)], low leakage (>200x reduction vs. SiO2/PolySi) and good PBTI. Low-k interface layer scaling and high-k La-doping enable this desirable EOT and Vt. SiON/HfLaSiON can give similar interface quality as SiO2/HfSiON. Device performance was further improved 5% by strain engineering. 2008 IEEE.

name of conference

• 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)

authors

• Harris, Rusty

published proceedings

• 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)

author list (cited authors)

• Huang, J., Kirsch, P. D., Hussain, M., Heh, D., Sivasubramani, P., Young, C., ... Jammy, R.

citation count

• 1

complete list of authors

• Huang, J||Kirsch, PD||Hussain, M||Heh, D||Sivasubramani, P||Young, C||Gilmer, DC||Park, CS||Tan, YN||Park, C||Harris, HR||Majhi, P||Bersuker, G||Lee, BH||Tseng, H-H||Jammy, R

publication date

• January 2008

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• International Symposium on Vlsi Technology Systems and Applications  Journal

Digital Object Identifier (DOI)

• 10.1109/vtsa.2008.4530842

International Standard Book Number (ISBN) 13

• 9781424416158

start page

• 152

end page

• 153

URL

• http://dx.doi.org/10.1109/vtsa.2008.4530842