Demonstration of High Performance Transistors with PVD Metal Gate Conference Paper uri icon

abstract

  • Transistors devices have been fabricated in the traditional gate-first approach with HfO2 and PVD TaN as the gate electrode. The stability of the PVD metal with the high dielectric constant material is studied in terms of the gate leakage, capacitance, transistor properties and reliability. Comparison of the PVD devices with the same devices using ALD TaN is performed to understand the influence of the PVD process on device properties. It is concluded that PVD deposition of metal gates with 1000oC poly activation anneal can be performed with no measurable damage to the dielectric and full thermal stability. Furthermore, one can realize high performance transistors with proper engineering of the PVD process 2005 IEEE.

name of conference

  • Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005.

published proceedings

  • Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005.

author list (cited authors)

  • Harris, H. R., Wen, H. C., Choi, K., Alshareef, H., Luan, H., Senzaki, Y., ... Lee, B. H.

citation count

  • 0

complete list of authors

  • Harris¹, HR||Wen, HC||Choi, K||Alshareef, H||Luan, H||Senzaki, Y||Young, CD||Song, SC||Zhang, Z||Bersukcr, G||Maihi, P||Lee, BH

publication date

  • January 2005