A Multilayered Design Approach for Efficient Hybrid 3D Photonics Network-on-chip Conference Paper uri icon


  • Copyright 2015 ACM. In Chip Multiprocessors, traditional metallic interconnects will soon reach their bandwidth and energy dissipation limits. Photonic NoC (PNoC) is a promising alternative to renew higher performance in the advent of rising number of cores on chip. Efficient PNoC architectures are needed to reduce laser related energy consumption and maintain high performance. In this work we propose a novel sandwich layered approach to design a 3D PNoC architecture that is able to reduce no of hops, cross over points, and no of laser sources using multiplexing techniques. The 3D hybrid PNoC uses high performance 55 photonic routers incorporating mode division multiplexing (MDM) along with wavelength division multiplexing (WDM) and time division multiplexing (TDM). Experimental results demonstrates an increase in aggregated bandwidth up to 4x while reducing average energy consumption per router by 83% as compared to the recently reported results.

name of conference

  • Proceedings of the 25th edition on Great Lakes Symposium on VLSI

published proceedings

  • Proceedings of the 25th edition on Great Lakes Symposium on VLSI

author list (cited authors)

  • Dang, D., Patra, B., & Mahapatra, R.

citation count

  • 4

complete list of authors

  • Dang, Dharanidhar||Patra, Biplab||Mahapatra, Rabi

publication date

  • May 2015