Probabilistic method to determine the minimum leakage vector for combinational designs Conference Paper

abstract

• "Parking" a circuit in a minimum leakage state during its standby mode of operation is one of the techniques of reducing leakage power consumption in a circuit. However, the problem of finding this minimum leakage state is NP-hard. In this paper, we present a heuristic approach to determine the input vector which minimizes leakage for a combinational design. Our approach utilizes approximate signal probabilities of internal nodes to aid in finding the minimum leakage vector. We use a probabilistic heuristic to select the next gate to be processed, as well as to select the best state of the selected gate. A fast SAT solver is employed to ensure the consistency of the assignments that are made in this process. Experimental results indicate that our method has very low runtimes, with excellent accuracy, compared to existing approaches. 2006 IEEE.

name of conference

• 2006 IEEE International Symposium on Circuits and Systems

authors

• Khatri, Sunil

published proceedings

• 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS

author list (cited authors)

• Gulati, K., Jayakumar, N., & Khatri, S. P.

citation count

• 3

complete list of authors

• Gulati, Kanupriya||Jayakumar, Nikhil||Khatri, Sunil P

publication date

• January 2006

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems  Journal

keywords

• 40 Engineering
• 4008 Electrical Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/ISCAS.2006.1693066

International Standard Book Number (ISBN) 10

• 0780393902

International Standard Book Number (ISBN) 13

• 978-0-7803-9389-9

start page

• 2241

end page

• +

URL

• http%3A%2F%2Fdx.doi.org%2F10.1109%2Fiscas.2006.1693066