Efficient don't care computation for hierarchical designs Conference Paper uri icon

abstract

  • In this paper, we describe a BDD-based hierarchical don't care computation algorithm. In contrast to traditional don't care computation techniques, our method retains the hierarchy in the design netlist during the don't care computation. Although this may reduce some of the flexibility inherent in the optimization process, it allows our technique to handle large designs. Our method computes don't cares at input and output interfaces of different modules in the hierarchy by an image computation process. In case an exact image image cannot be computed, our method computes the largest approximate image. Once the don't cares at the input and output interfaces are computed, the hierarchical instances are optimized separately using a traditional optimization flow. Experimental results demonstrate that our technique can achieve a 36% reduction in literal count for large hierarchical designs, with reasonable runtimes. Our method can complete for several examples in which flattened optimization fails. 2006 IEEE.

name of conference

  • 2006 IEEE International Symposium on Circuits and Systems

published proceedings

  • 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS

author list (cited authors)

  • Gulati, K., Lovell, M., & Khatri, S. P.

citation count

  • 0

complete list of authors

  • Gulati, Kanupriya||Lovell, Matthew||Khatri, Sunil P

publication date

  • January 2006