A Robust Window-Based Multi-node Minimization Technique Using Boolean Relations Chapter

abstract

• In this chapter, a scalable dual-node technology-independent logic optimization technique is presented. This technique scales well and can minimize both small designs and large designs typical of industrial circuits. It is experimentally demonstrated that this technique produces minimized technology-independent networks that are on average 12% smaller than networks produced by single-node minimization techniques. 2011 Springer Science+Business Media, LLC.

authors

• Khatri, Sunil

author list (cited authors)

• Cobb, J. L., Gulati, K., & Khatri, S. P.

citation count

• 0

complete list of authors

• Cobb, Jeff L||Gulati, Kanupriya||Khatri, Sunil P

Book Title

• ADVANCED TECHNIQUES IN LOGIC SYNTHESIS, OPTIMIZATIONS AND APPLICATIONS

publication date

• December 2011

publisher

• Springer Nature  Publisher

keywords

• 40 Engineering
• 4009 Electronics, Sensors And Digital Hardware
• 46 Information And Computing Sciences

Digital Object Identifier (DOI)

• 10.1007/978-1-4419-7518-8_17

International Standard Book Number (ISBN) 13

• 978-1-4419-7517-1

URI

• https://hdl.handle.net/1969.1/ETD-TAMU-2023

start page

• 309

end page

• 334

URL

• http%3A%2F%2Fdx.doi.org%2F10.1007%2F978-1-4419-7518-8_17