Academic Article RDF
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- A 4 Bit Continuous-Time $Sigma Delta $ Modulator With Fully Digital Quantization Noise Reduction Algorithm Employing a 7 Bit Quantizer
- A 4 Detector Array, NIMROD-ISIS
- A 4,103 marker integrated physical and comparative map of the horse genome.
- A 4-CHANNEL PHOTON-COUNTER FOR RAMAN-SPECTROSCOPY
- A 4-PARAMETER CHANGE-POINT MODEL FOR PREDICTING ENERGY-CONSUMPTION IN COMMERCIAL BUILDINGS
- A 4-week morning light treatment reduces amygdala reactivity and clinical symptoms in adults with traumatic stress.
- A 40-million-year history of atmospheric CO(2).
- A 43-mW MASH 2-2 CT Sigma Delta Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS
- A 44 GHz CMOS RFIC Dual-Function Attenuator with Band-Pass-Filter Response
- A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs
- A 5 x 10(9) M-circle dot BLACK HOLE IN NGC 1277 FROM ADAPTIVE OPTICS SPECTROSCOPY
- A 5-formyltetrahydrofolate cycloligase paralog from all domains of life: comparative genomic and experimental evidence for a cryptic role in thiamin metabolism.
- A 5-GHz CMOS LC Quadrature VCO with Dynamic Current-Clipping Coupling to Improve Phase Noise and Phase Accuracy
- A 5-PHASE RELUCTANCE MOTOR WITH HIGH SPECIFIC TORQUE
- A 5-PORT HYBRID RING MIXER DESIGN
- A 50 Gb/s PAM-4 VCSEL Transmitter With 2.5-Tap Nonlinear Equalization in 65-nm CMOS
- A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET
- A 50-step walking test for analysis of recovery after decompressive surgery for thoracolumbar disc herniation in dogs.
- A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS
- A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR-and IIR-Tap Adaptation in 65-nm CMOS
- A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications
- A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS
- A 6-Gbit/s Hybrid Voltage-Mode Transmitter with Current-Mode Equalization in 90-nm CMOS
- A 60 GHz 2.5 Gbps OOK Modulator with Data-Dependent Impedance Cell for Enhanced ON/OFF Isolation in 0.18 $mu$m BiCMOS Process
- A 60-dB dynamic-range CMOS sixth-order 2.4-Hz low-pass filter for medical applications
- A 60-kilodalton protein component of the counting factor complex regulates group size in Dictyostelium discoideum.
- A 60-mW 200-MHz Continuous-Time Seventh-Order Linear Phase Filter With On-Chip Automatic Tuning System
- A 63 dB SNR, 75-mW Bandpass RF $SigmaDelta$ ADC at 950 MHz Using 3.8-GHz Clock in 0.25-$mu{hbox {m}}$ SiGe BiCMOS Technology
- A 64-channel transmitter for investigating parallel transmit MRI.
- A 75-MHz Continuous-Time SigmaDelta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage