Jing Wang, .., Walker, D. M., Xiang Lu, .., Majhi, A., Kruseman, B., Gronthoud, G., ... Eichenberger, S
(2007).Modeling Power Supply Noise in Delay Testing. IEEE Design and Test of Computers.
24(3), 226-234.
Jungran Lee, .., Walker, D., Milor, L., Yeng Peng, .., & Hill, G
(1999).IC performance prediction for test cost reduction. IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings.
111-114.
Balasubramaniam, S., Sarwar, A. K., & Walker, D
(1997).Yield learning in integrated circuit package assembly. IEEE Transactions on Components, Packaging and Manufacturing Technology. Part C. Manufacturing.
20(2), 133-141.
Walker, D., Kellen, C. S., Svoboda, D. M., & Strojwas, A. J
(1993).The CDB/HCDB semiconductor wafer representation server. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems.
12(2), 283-295.
Qiu, W., H. Walker, D., Simpson, N., Reddy, D., & Moore, A
(2006).Comparison of Delay Tests on Silicon. 2013 IEEE International Test Conference (ITC).
1-10.
Wang, J., H. Walker, D. M., Majhi, A., Kruseman, B., Gronthoud, G., Villagra, L. E., van de Wiel, P., & Eichenberger, S
(2006).Power Supply Noise in Delay Testing. 2013 IEEE International Test Conference (ITC).
1-10.
Wangqi Qiu, .., Xiang Lu, .., Zhuo Li, .., Walker, M. H., & Weiping Shi.
(2003).CodSim - A Combined Delay Fault Simulator. 18TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS.
79-86.
Qiu, W., Lu, X., Li, Z., Walker, D., & Shi, W
(2003).CodSim - A combined delay fault simulator. 18TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS.
79-88.
Lakkapragada, S., & Walker, D
(1995).Defect-tolerant processor arrays. Proceedings of the Annual IEEE International Conference on Innovative Systems in Silicon.
228-237.
Naik, R., & Walker, D
(1995).Large integrated crossbar switch. Proceedings of the Annual IEEE International Conference on Innovative Systems in Silicon.
217-227.