Collaborative Research: Computational Study of Low Volume Solder Interconnects for 3D Integrated Circuit Packaging
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abstract
Moore''s Law, which predicts that the number of transistors in an integrated circuit doubles approximately every two years, has been a major driver for the US economy for decades. Unfortunately, technological and fundamental challenges associated with continued device shrinking make the current rate of progress unsustainable. Recently, 3D integrated circuit technology has emerged as a leading approach to keep up with Moore''s Law by stacking chips rather than by shrinking device dimensions. To achieve 3D integration, new joining technologies for interconnection and stacked bonding must be developed. Bonding by low volume solder interconnects is specially promising due to their good electrical, thermal, and mechanical properties. This collaborative research award supports fundamental research to obtain the knowledge needed for the development of low volume solder interconnects. Research results will not only help realize the full potential of this new bonding technique in 3D integrated circuit packaging, but also be used to improve joining methodologies important in the aerospace and nuclear power industries and in power electronics and thermal management applications. Moreover, the project will help establish an effective collaboration between the two PIs who are both from underrepresented groups.The small dimensions of low volume solder interconnects make it possible for the solder joints to solidify isothermally through the formation of intermetallic compounds at the expense of the liquid solders. This technique, also known as Transient Liquid Phase Bonding, allows the formation of a joint at temperatures lower than the expected operating conditions, minimizing damage to the temperature-sensitive components of the circuits from overheating. However, the small dimensions of low volume solder interconnects lead to large current densities during operation. These large current densities induce large electrical, thermal, and mechanical driving forces which give rise to complex microstructural processes. This research aims to advance the fundamental understanding of the complex microstructure processes in low volume solder interconnects, in particular about the important microscopic mechanisms governing processing-microstructure-property-performance relationships. The research team will develop an integrated multi-physics phase field modeling and perform systematic simulation studies of the microstructure formation and evolution during processing, operation, and damage of low volume solder interconnects. The simulations will be used to correlate macroscopic processing parameters and operating conditions to microscopic phenomena involving diffusion, current flow, heat transfer and stress concentration, and elucidate the mechanisms of defect formation.
