FFATA:Advanced Modeling and Design of High-Performance ADC-Based Serial Links Grant uri icon


  • Intellectual Merit: The high-speed serial link architectures and design techniques proposed in this work aim to significantly improve inter-chip interconnect energy efficiency and bandwidth density, which is necessary for continued scaling of future compute systems. While significant progress has been made in increasing serial link data rates through the use of analog/mixed-signal equalization, there are limits to the amount of channel loss that analog/mixed-signal equalizers can compensate and also challenges in scaling these circuits to nanometer technologies. This motivates the use of analog-to-digital converter-based analog front ends in inter-chip interconnect receiver design. The work''s research goal is to develop high-performance energy-efficient converter-based high-speed serial link architectures applicable to future computing systems. To accomplish this goal, an ultra-fast statistical-modeling optimization framework for converter-based serial links that investigates trade-offs in resolution and analog/digital equalization complexity will be developed and leveraged in the design of the proposed architecture. Novel circuit topologies will be developed that enable efficient modulation agile transmitters and the embedding of partial analog equalization in the converter. The combination of system level optimization with circuit-level accuracy and new ultra-efficient circuit topologies enables architectures capable of leveraging more digital equalization whose efficiency improves with each technology generation. Broader Impact: The explosion in interconnect bandwidth capacity provided by this converter-based serial link architecture will allow the realization of numerous transformative applications, such as future smart mobile devices capable of Tflop/s performance, multi-channel high-resolution magnetic resonance imaging, and exascale supercomputers necessary for climate modeling and protein folding simulations. Interconnect architectures developed with the proposed optimization framework will have a broad impact on not only the semiconductor industry, but also on the sustainability and security of the nation as a whole, as it will dramatically reduce the energy these integrated systems demand. This project will include an interdisciplinary educational program involving 2 Ph.D. and 3 undergraduate students, with a commitment in several engaging outreach activities to foster the representation of women and minority groups. Project results will be broadly disseminated by inclusion in the syllabi and website of the graduate course entitled "High-Speed Links Circuits and Systems" and through publication in national and international journals and conferences.

date/time interval

  • 2012 - 2015