(Invited) UV and Gate Stress Induced Defects in Amorphous Indium Gallium Zinc Oxide Thin Film Transistors and Self-Repair

Defects were generated in the amorphous indium gallium zinc oxide thin film transistor under combined ultraviolet light illumination and gate bias stress conditions, which showed as the positive shift of the threshold voltage and the increase of the threshold swing. When exposed to the ultraviolent light without or with the positive gate voltage bias, positively charged defects were quickly generated and saturated at the gate dielectric interface. Majority of these defects were self-repaired at room temperature under air exposure within 5 minutes. On the other hand, under the ultraviolent exposure and negative gate voltage bias condition, two types of defects were generated, i.e., those loosely trapped at the interface and those deeply trapped in the bulk of the gate dielectric layer. At room temperature, the former were quickly self-repaired and the latter were slowly self-repaired. All defects were removed when annealed at 200C. The understanding of the defect generation and removal mechanism is important for practical applications of this type of oxide thin film transistor.

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