On-chip testing techniques for RF wireless transceivers Academic Article

abstract

• This article describes a set of on-chip testing techniques and their application to integrated wireless RF transceivers. The objective is to reduce final product cost and accelerate time to market by providing means of testing the entire transceiver system as well as its major building blocks without using off-chip analog or RF instrumentation. On-chip test devices fabricated in a standard CMOS process and experimentally evaluated support the proposed test strategy. 2006 IEEE.

authors

• Silva-Martinez, Jose

published proceedings

• IEEE DESIGN & TEST OF COMPUTERS

altmetric score

• 3

author list (cited authors)

• Valdes-Garcia, A., Silva-Martinez, J., & Sanchez-Sinencio, E.

citation count

• 51

complete list of authors

• Valdes-Garcia, Alberto||Silva-Martinez, Jose||Sanchez-Sinencio, Edgar

publication date

• April 2006

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

keywords

• 40 Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/MDT.2006.100

start page

• 268

end page

• 277

volume

• 23

issue

• 4

URL

• http://dx.doi.org/10.1109/mdt.2006.100